Principal ASIC Design Engineer

Principal ASIC Design Engineer Overview

Join a leading British technology company that specializes in designing innovative computing platforms utilized by millions globally. As they expand their in-house ASIC capabilities to support an exciting product roadmap, they are looking for a Principal ASIC Design Engineer to be part of their growing team in Cambridge.

The Opportunity

In this pivotal role, you will be involved in the development of next-generation silicon products within a small, collaborative team. You will have the chance to engage in the complete silicon development lifecycle, from architecture and specification through design, verification, implementation, testing, and product qualification. This position is ideal for an experienced IC Design Engineer who thrives on taking ownership and working across multiple disciplines to deliver innovative silicon solutions.

Responsibilities

• Take charge of front-end development tasks, overseeing the process from specification through design, verification, and implementation.
• Define, specify, configure, and integrate both IP and system-level functionalities.
• Lead the planning and execution of verification processes for complex System on Chip (SoC) and Microcontroller Unit (MCU) designs.
• Work closely with software teams to ensure effective integration between hardware and software.
• Support FPGA platforms utilized for software development and pre-silicon validation.
• Collaborate with implementation teams to address challenges related to timing, power, and physical design.
• Contribute to the overall ASIC development workflow to guarantee successful product delivery.

Requirements

• A minimum of 10 years of experience in SoC or MCU architecture and design.
• Demonstrated success in delivering at least one silicon tape-out where you had architectural ownership of a complete chip or a significant subsystem.
• In-depth knowledge of modern microcontroller and processor architectures, including real-time operations and deterministic interrupt handling.
• Experience with low-power architectures and familiarity with Flash and SRAM hierarchies.
• Proficient in common peripheral interfaces such as SPI, I²C, UART, USB, ADC/DAC, timers, and programmable I/O fabrics.
• Strong understanding of broader SoC architecture, including AXI, AHB, and APB interconnects, cache hierarchies, DMA, and memory controllers.
• Knowledge of security architectures and integration of operating system-class subsystems alongside real-time domains.
• A solid grasp of the practical aspects of chip implementation, including RTL design (SystemVerilog), verification methodologies (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints.
• Familiarity with scripting languages such as Bash, Python, or Tcl.

This position is based in Cambridge and requires full-time onsite attendance. The company offers a competitive compensation package along with various non-monetary benefits. If you are interested in this opportunity, please reach out to Rachel Mason at IC Resources.

Degree Requirement: Not Specified

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