Staff ASIC Design Engineer

IC Resources Recruitment

Staff ASIC Design Engineer Overview

Company Name IC Resources Recruitment
Job Role Staff ASIC Design Engineer
Qualifications Not Specified
Category IT Jobs
Job Type Full Time
Location Cambridge

Join a dynamic and expanding semiconductor company based in Cambridge, England, as a Staff ASIC Design Engineer. This role offers a broad scope of responsibilities across the entire ASIC development process, from initial architecture and RTL design to verification, DFT, physical implementation, and silicon validation. The position involves engaging in challenging mixed-signal design work while also providing opportunities for technical leadership and contributing to the enhancement of design methodologies within a leading UK technology hub.

Key Responsibilities

  • Design and develop digital functional blocks, supporting the creation of complete mixed-signal ASICs from concept to production.
  • Assist in defining product specifications through feasibility studies, architecture development, and FPGA-based digital emulation.
  • Create RTL designs in SystemVerilog that fulfill system performance, functionality, and quality standards.
  • Build detailed verification environments and testbenches to thoroughly validate digital components.
  • Conduct digital synthesis and develop physical design constraints to optimize power, performance, and silicon area.
  • Maintain detailed design documentation and participate actively in design review sessions.
  • Provide technical guidance and mentorship to junior engineers and team members.
  • Lead efforts to improve digital design workflows and adopt best practices industry-wide.

Candidate Requirements

  • A minimum of five years’ experience in digital IC design using standard-cell methodologies.
  • Strong knowledge of digital design processes and best practices in the industry.
  • Expertise in RTL development, logic synthesis, and fully synthesizable digital design flows.
  • Proficiency in SystemVerilog and familiarity with modern digital EDA tools.
  • Experience applying timing and physical constraints within automated place-and-route flows.
  • Hands-on experience with DFT techniques, especially scan-based testing, to maximize test coverage.
  • Knowledge of low-power design techniques and power optimization strategies.
  • Proficiency in scripting languages such as TCL and Python for automation tasks.

Benefits

  • Competitive salary and benefits package, including stock options and participation in an employee stock purchase scheme.
  • Opportunity to work in a leading UK semiconductor environment with exposure to innovative mixed-signal ASIC projects.
  • Supportive team environment with opportunities for leadership and professional growth.

Work Pattern

This position is based onsite in Cambridge, England, with no mention of remote or hybrid working options.

Sponsorship Information

The listing indicates that the role is likely to sponsor visa applications, as denoted by the ‘likely_to_sponsor’ status. However, the page does not explicitly state whether visa sponsorship is offered or details any sponsorship policies.


Degree Requirement: Not Specified

Visa Sponsorship May be

To apply for this job please visit ic-resources.com.